JPRS ID: 9826 USSR REPORT CYBERNETICS, COMPUTERS AND AUTOMATION TECHNOLOGY EXCERPTS FROM THE JOURNAL "COMPUTER TECHNOLOGY OF THE SOCIALIST COUNTRIES"

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• Original Classification: U
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• Content Type: REPORTS

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- JPRS L/9826
6 July 1981
U SS R Re ort
p
CYBERNETICS, COMPUTERS AND
AUTOMATION TECHNOLOGY
(FOUO 16/81)
Excerpts from the Journal 'COMPUTER TECHNOLOGY
O~F THE SOCIALIST COUNTRIES'
- FBIS FOREIGN BROADCAST I(~FORMATION SERVICE
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JPRS L/9826
6 July 1981
- USSR REPORT
CYBERNETICS, COMPUTERS AND AUTOMATION TECHNOLOGY
(FOITO 16/81)
EXCERPTS FROM THE ~OURNAL 'COMPUTER TECHNOLOGY
OF THE SOCIALIST COUNTRIES'
Moscow VYCHISLITEL'NAYA TEKHNIKA SOTSIALISTICHESKIKH STRAN in Russian
No 8, 1980
CONTENTS
Table of Contents From Collection 'COMPUTER TECHNOLOGY OF THE SOCIALIST
COUNTRIES' 1
_
Computer Technology of the Socialist Countries 3
Development Stages of the Small Computer System 5
SM-52/10 Small Computer 10
Modular Concept in Developments of GDR Data Preparation Units and
Terminals for YeS and SM Computers 14
Development of Small Computers in Cuba 20
Principles of Building Multilevel Automated Control Systems 24
SM-1 and SM-2 Control Computer Complexes 31
Terminal Interface Machine Based on the SM-3 Computer 39
Microcomputer Application in Laboratory Gas Chromatography 44
Organization of Multiprocessor Operation Based on SM-50/40-1
Microcomputer Kodules 52
- a- [III - USSR - 21C S&T FCUO]
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SM-SO/ZO-2 Microcomputer 57
F1oPPY Disk Storage Units 66
Units for Gommunication With the Object of Control Computer Complexes
in the SM EVM 72
I'OBOS Operating System for Small Computers 81
IRIS Data Base for a Hierarchic Multimachine Complex 86
Computer Instruction Interpreter 90
SM-5304 Magnetic Tape Storage Unit 92
New Hardware for the System of Small Computers 9b
- b -
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I~OR OFFI('IA1. 1 ~~E: O'~I.l'
TABLF. OF CONTT:NTS FROM COLLECTION 'COMPUTER TECHNOLOGY OF THE SOCIALIST COUNTRIES'
Moscow VYCHISLITEL'NAYA TEKHNIKA SOTSIALISTICHESKIKH STRAN in Russian No 8, 1980
(si gned to press 17 Nov 80) p 155
[Table of contents from book "Comp,rter Technology of the Socialist Countries", a
collection oF articles, edited by M., Ye. Rakovskiy, Izdar_el'stvo "Statistika",
16,000 copies, 168 pages]
_ [Text] Contents Page
Pref ace 3
I. International Cooperation between the Socialist Countries in
Computer Technology
Naumov, B. N. Development Stages of the Small Computer System 5
Gantner, Ya. The SM-52/10 Sma].1 Computer Ip
Merkel, G, and Jungnickel, H. G. The Modular Concept in Developments
of GDR Data Preparation Units and Terminals for YeS and SM Computers 13
Karrasko, L. H. Development of Small Computers in Cuba 19
Sedegov, R. S.; Bashko, V. A. and Shipulin, A. M. Principles of
Building a Mulrilevel ASU 23
II. Computer Hardware
Kustely,anskiy, V. M, and Rezanov, V. V. The SM-1 and SM-2 Control
Computer Complexes 30
Beiner, T.; Treis, P. P, and Yakubaitis, E. A. The Terminal
Interface Machine Based on the SM-3 Computer 38
Fd~r.e, W. and Kummer, M. Microcomputer Application in Laboratory Gas
Chromatography L;.2
Gus'kov, V. D.; Kabanov, Y1. D.; Kravchenko, V. S. and Shkamarda, A. N.
Organization of Multiprocessor Operation Based on SM-50/40-1 Micro-
computer Modules 49
" Giebler, H, and Lauermann, M. The SM-50/SO-2 Microcomputer 54
Pieszko, A. and Gwizdala, B. Floppy Disk Storage Units 63
Sokolov, A. Ya.; Sopochkin, L. A.; Strashun, Yu. P, and Sergeyev, L. A.
Computer.-to-Object Adapter for SM Control Computer Complexes 69
Lyubimov, A. C. Power Supplies for Minicomputers 7g
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III. Computer Software
Machacka, I. The FOBOS Operating System for SM Computers 87
Prachenko, V. D.; Filinov, Ye. N. and I:hristochevskiy, S. A.
The IRIS Data Base for a Hierarc:.ic Multimachine Complex 93
Vigdorchik, G. V.; Vorob'yev, A. Yu. and Rostokin, B. I. Discrete and
ContinuoLS Process Simulation System for SM Computers 95
Kratochvil, E. anci Chlouba, Ya. PROTAB--Decision Table Translators
for YeS Computers 103
IV. Application of Computer Facilities
Landau, I. Ya. and Vagner, E. N. Avtomated Design Stations and a New
Approach to Computer Aided Design 111
- Rusnak, Ya.; Gorsky, I. and Smolak, L. Creating an ASU for a Multi-
purpose Hospital Based on a Minicomputer 116
Ivanov, D. and Kharalanov, B. Automated System for Real-Time
Production Management in Food Industry Enterprises 126
Szekely, T. and Shatalina, L. S. ASU for the Association
"Mosavtotekhobsluzhivaniye" [Noscow Motor Vehicle Maintenance] 131
- V. Information on New Computer Facilities
Mir~os, L. The SM-5304 Magnetic Tape Storage Unit 139
Simeonov, D. and Iliyev, B. Computer In~truction Interpreter 142
New SM Computer Hardware 144
_ Abstracts ' 157
COPYRIGHT: Izdatel'stvo "Statistika", 1980
8545
CSO: 1863/157
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C~MPUTER TECHNOLOGY OF THE SOCIALIST COUNTRIES
Moscow VYCHISLITEL'NAYA TEKHNIKA SOTSIALISTICHESKIKH STRAN in Russian No 8, 1980
(signed to press 17 Nov 80) pp 2-4
_ [Annotation and preface from book "Computer Technology of the Socialist Countries",
a collection of articles, edited by M. Ye. Rakovskiy, Izdatel'stvo "Statistika",
16,000 copies, 168 pages~
[Text] This international collection deals with the problems of research, develop-
ment, application and operating experience of computer hardware and software deve-
loped under the agreement on cooperati~n in computer technology between the
socialist countries: the NRB [People's Republic of Bulgaria], the VNR [Hungarian
People's Republic], the GDR [German Democratic Republic], the PNR [Polish People's
RepublicJ, the Republic of Cuba, the SRR [Socialist Republic of Romania], the ChSSR
[Czechoslovak Socialist Republic] and the USSR.
Treated in this collection of articles are general development problems of the small
cornputer system (SM EVM), specific hardware and systems for the SM EVM, soft-
ware for the SM EVM and problems of application of SM EVM facilities in hierarchic
multimachine complexes, computer networks and ASU's.
The collection is intended for specialists engaged in developing and using
_ facilities of the YeS [unified systen] and SM computers.
Preface
The level of automation of processes in the various spheres of social producti~n is
largely determined by the presence ~f mini and micro computers which thanks to mi-
croelectronic technology, advanced software, simplicity of maintenance and low cost
_ are gaining more and more fields of application and becoming the most widespread
class of computers.
CharacteristiCs of th~ si~all ._computer system (SM ~VM), developed in the socialist
countries, were determined primarily by the needs of the countries for creating
automated control syster~is (ASU), automating scientific experi.ment5, automating de-
sign, and using computers in the nonindustrial sphere. The SM._computer develop-
ment program presupposes simultaneous development of hardware and software in the
form of problem oriented compl.exes that will encompass the various fields of
application.
3
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Considering the large number of developments in the socialist countries, the ex-
perience Qf applying small computers in various fields and the great interest in
this class of machines, this, the eighth issue of the collection "Computer Techno-
logy of the Socialist Countries," is devoted to this theme.
This collection includes both articles dealing with general problems of SM comp~-
ter development in the socialist countries, and articles on specific SM computer
hardware and systems (~M. computer complexes, SPi computer power supplies, floppy
disks in SM computers and others) and software. Articles i.n the collection show
the application of Sr'. computers in hierarchic multimachine complexes, computer
networks, automated control systems and for automation of design. The collection
also includes articles on the SM-SO/SO-2, SM-50/10-1 and SM-50/40-1 microconputer
systems.
Without question, even a topical collection on small computers does not cover fully
all thetasks and efforts underway in the cooperation of development; of mini and
micro computers, but from time to time we tiope to return to this topic and publish
articles un the most varied aspects of development and application of small compu-
ters and on the problems of their standardization, operation and maintenance.
The Editors
COPYRIGHT: Izdatel`stvo "Statistika", 1980
8545
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DEVELOPMENT STAGES OF THE SMALL COMPUTER SYSTEM
Moscow VYCHISLITEL'NAYA TEKHNIKA SOTSIALISTICHESKIKH STRAN in Russian No 8, 1980
- (signed to press 17 Nov 80) pp 5-10
- [Article by B. N. Naumov, corresponding member of the USSR Academy of Sciences
(USSR), from book "Computer Technology of the Socialist Countiies", a collection of
articles, edited by M. Ye. Rakovskiy, Izdatel'stvo "Statistika", 16,000 copies, 168
pages ]
[Text] The small computer system (SM EVM) is a modular complex of hardware and
software intended primarily for use in real-time systems and organically tied to
the requirements that the use.r dictates. Therefore, the selection of characteris-
- tics and determination of the nomenclature of the modules of control computer com-
plexes (UVK) involves profound and broad analysis of user requirements.
The small computer system is being developed in several ctages. The first phase of
- the small computer hardware development plan specified development c� a function-
ally complete set of hardware during the period from 1976 through 1980 for con.fig-
uration of various automated systems. This task was essentially completed in 19?9.
Within the small computer system, about a hundred different devices representj.n.b a
functionally complete set have been developed, tested and are in production; this
set enables building automated systems of varying complexity.
Four models of processors with different throughput, the SM-1P, SM-2P, SM-3P and
the SM-4P (Poland, Cuba, Romania, USSR and CSSR), and a series of main memories and
devices for systems complexing (Bulgaria, Hungary, Poland, USSR and CSSR) have been
developed under the first phase of the program; these devices enable building sys-
tems with a variable configuration and wide range of characteristics. The small
computer system includes a large set of peripherals: external storage on fixed and
removable magnetic disks and on floppy disks, input and output devices ~perating
with perforated tape and cards, serial and parallel printers, alphanumeric and
graphic displays, equipment for transmitting data over telephone and telegraph
channels, data preparation devices and devices for communication with an object.
The following table shows the number of devices by individual groups of equipment
that successfully passed joint tests in the period 1977 to 1979 (second-phase de-
vices that were tested in 1979 are also included in the table):
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Equipment Groups BU HU GDR Cuba PO RO USSR CSSR Total
Processors - - 2 1 1 1 4 2 11
Main Memories 1 - - - 1 - 2 3 7
ExternaZ Storage Devices and
Controllers for Them 7 4 - - 5 - 2 3 21
Input-Output Devices and
Controllers for Them 1 6 5 - 6 2 2 8 30
Terminals and Terminal Stations - 5 1 1 1 - 1 1 10
Devices and Terminals for
Communication with an Object - - - - - - 2 2 4
Data Transmission Devices - 3 - - - - 2 4 9
Data Preparation Devices 1 - 2 - - - - 1 4
Inter- and Intrasystem
Communication Devices - - - - - - - 3 3
Other Devices - - - 1 - - - 1 2
Totals by Country 10 18 10 3 14 3 15 28 101
Also tested in 1977-1979 were 28 software components--operating systems and
application program packages.
The traditional sequence of developing s~ftware after completi~n of hardware deve-
lopment often leads to obsolescence of a system even before it is put into opera-
tion. The small computer system development plans specify simultaneous development
of hardware and software, as well as control systems based on them in the form of
pr.oblem-oriented complexes (POK). In the process, the technical level of control
systems based on the small computer system is being raised considerably through the
organization of distributed data processing in control systems using sever.al com-
patible small computers. This raises system rel~ability and viability considerably,
and in addition, by bringing out and localizing autonomous control loops, makes it
possible to simplify and accelerate program writing and debugging which results in
reducing the time needed to put a system into operation.
A large number of systems for various users based on one or several, if necessary,
problem-oriented complexes are developed by varying the structure of hardware and
software and elaborating the software with specific applied tasks. The most labor-
intensive tasks of tying the hardraare needed *_o the basic software under the con-
crete modes and conditions of operation are handled by the skilled specialists of
the leading systems organizations and organizations-developers of the hardware
when the pr_oblem-oriented complex is created.
Development of the first phase of the small computer system has led to a signifi-
c~?nt improvement in the t-echnical level of the small computers produced by the in-
dustry oF the socialist countries. The physical sizes of complexes have been
sharply reduced (to about one-fifth of the previ.ous size), cost has been reduced
considerab.ly (to about one-half of the previous cost), and reliability indicators
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have improved (about twofold). This was achieved by shifting to microprogram con-
trol in processors, using microcircuits with a higher degree of integration and im-
proved connecting pins, usi:~g small power sources and compact peripherals and by
raising the manufacturability of the designs.
In 1977, the "Concept for Development of the Small Computer System (Second Phase)"
was adopted; the basic directions for development were formulated in it. And in
1978, the "Preliminary Design, Plans and Specifications for the Second Phase of the
- Small Computer System" was accepted. Elaboration of the "Development Program for
the Second Phase of the Small Computer System" is nearing completion. The concept,
design and program set several goals. The major goals are:
fuller satisfaction of national economic demand for, and elimination of the shortage
of, small computer hardware to Luild automated systems in various sectors and to
perform autonomous design operations;
creation of the prerequisites for mass introduction of this class of hardware into
the national economy;
improvement of the technical and economic indicators for the hardware, expansion of
- its fuactional capabilities and enhancement of flex~bility, bringing the technical
level of the small computer system closer to the level of the best modern small com-
puters; and
- raising the economic effectiveness of utilization of computer equipment.
Proceeding from these goals, the concept, design and program for. developing the
second phase of the small computer system envision a substantial zxpansion of the
computer nomenclature with regard to specialization in the hierarchy of hardware,
including in teleprocessing network sysCems.
The element base for this phase of computers will consist of three microprocessor
series (sets) of large-scale integrated circuits distinguished for speed of response
and power consumption. The sets are standardized in design and will have the
necessary elements for matching of signal levels.
_ First phase models of the small computer system using second phase microprocessor~;
will basically have the appearance of systems with processors-expanders. In these
systems, the new system processors will be compatible with those of the first phase
computers, the capability of realizing certain software functions by hardware will
be provided, the central pr.ocessor will be unloaded by having the processors-e::pan-
ders perform a number af functions (input-output processors, file management pro-
cessors, communications processors in mulLimachine systems, specialized processors,
for example for Fourier transformations, and othPrs). Using specialized processors
in control and computer complexes will make it possible to increase average through-
put in certain classes of problems b,y an order of one-two.
A substantial portion of the nomenclature of control devices--controllers for the
peripherals will also be realized on the basis of microp7ocessors. In the process,
the same functional modules may be used for operation with different peripherals.
To perform specific prescribed functions, these modules will be pro~rammed at the
level of microinstructions or conventional instructions of microproce~sors. This
will make it possible to standardize hardware, reduce hardware outlays for realiza-
tion of devices with fixed logic, increase flexibility during system design and im-
plementation and raise i~eliability considerably.
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In the second phase of the small computer system, it is planned to develop superior
_ models that have considerably higher throughput (several millions of operations per
second with a main memory capacity up to 1-2M bytes) than first phase models, with
advantageous economic indicators. These models are intended for use in the upper
levels of control systems operating in real time, where it is necessary to provide
for acquisition and processing of large information streams or solving complex prob-
lems for which the throughput of conventional small computers is insufficient and
the application of large computers is inefficient. These are, For example, systems
for complex scientific research, systems for monitoring and testing complex objects
and systems for control of fast-flowing processes.
The superior models will have a flexible architecture, ensuring program compatibil-
ity from the bottom up. Their architecture is also oriented to efficient rezliza-
tion of high-level programming languages to sharply reduce labor and machine-time
outlays for development and debugging of complex application programs, to a ratio-
_ nal combination of junior and superior models of the small computer system (as well
as of rhe unified system computers) in multimachine complexes, and to the develop-
ment of the principles of building multiprocessor complexes with specified
reliability, viability and throughput.
Based on these prerequisites, five new classes of models are planned in the program
for the second phase of the system of small computers.
The first class of models of second-phase small computers are the microcomputers
built with microprocessor sets (models of the SM-50 class). This class is intended
for mass application in systems for numeric program control, for building into com-
plex scientific and measuring instruments, intelligent terminals and terminal sta-
tions for office work. Based on the SM-50 c1asG of microcomputers, general-purpose
conrrollers are being developed that will enable raising considerably system
throughput by transferring some oper3tir_g system functions to hardware.
The second class are the system compatible small computers of the SM-51 class that
ensure continuity of the software and entire series of peripherals with first-phase
models. The technical and economic characteristics of th~se models (speed of re-
sponse, size, power consumption, storage capacity, etc.) must be substantially
(two- to fourfold) improved compared to first-phase models by shifting to a new
element base and more progrescive technological design solutions.
The third class are models of the SM-52 class which have greater throughput, memory
capacity anrl structural reconfiguration capabilities in the small computer system.
Multiprocessor versions of the models are possible. SM-50 and SM-51 class compu-
ters may be used as input-output channels in these models. Being intermediates
~between small computers and unified system machines in their capabilities, these
- models are suitable for small problem-oriented networks in hierarchic integrated
, control ~~~stems.
Model.s in the SM-53 class are actually multl.processor and multimachine complexes
built with modules of ttie other classes, hardware for intermachine and interproczs-
sor ~ommunicazion and integrated software which ensuresa rational distribution of
the computing process over the system facilities.
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SM--54 class models are specialized processors that realize individual algorithms
(such as fast Fourier transformation, matrix operations, etc.) by hardware and make
_ it possible to obtain with these algorithms a very high throughput, exceeding that
of large high-speed computers by an order of one-two. Using these processors in
combination with models of other second-phase small computer system classes will
make it possible to build Pfficient systems for data processing in the real-time
_ mode in applications such as analysis and synthesis of speech, analysis of aerial
photography, analysis of seismic prospecting results and others in which the appli-
cation of today's computers is limited because of their low speed of response.
In addition to the new classes uf models in the secund-phase small computer system,
plans calJ. for development of a large r.umber of new Feripherals with rather hi.gh
quality. ~specially worth noting is that the second-phase sma11 computer system
will have a broad range of various types of terminal stations that, on the one
hand, wiil be capable of autonomous data processing at the work station, and on the
other, wil'1 provide user access to a higher-ranking computer network when needed.
- In addition to the directions associated with developme~at of hardware and computer
complexes, a broad program of software development is planned. In the software de-
velopment, consideration is being given to the specific nature of small machines,
which does not permit giving the programmer a large choice of hardware as is done
with large machines. On the other hand, the necessity of ensuring operation of the
small computers in systems and in the required modes (real-time, burst, data acqui-
sition, interactive, time-sharing) deterwines the expediency of developing a set of
- operating systems, each fo which efficiently realizes some one of these modes.
Such systems are considerably simpler than the general-purpose systems of large
computers.
To facilitate programming of various application tasks, development is underway on
programming systems that would require the user to specify only the functions
needed, relieving him of~concern for how this will be performed. Efforts are also
in progress to develop more efficient problem-oriEnted programming languages and
the corresponding translators.
COPYRIGHT: Izdatel'sCvo "Statistika", 1980
8545
~ CSO: 1863/157
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SM-52/10 SMALL COMPUTER
Moscow VYCHISLITEL'NAYA TEKHNIKA SOTSIALISTICHESKIKH STRAN in Russian No 8, 1980
(signed to press 17 Nov 80) pp 10-13
- [Article by Ya. Gantner, engineer, Hungarian People's republic. from book "Computer
Technology of the Socialist Countries", a collection of articles, edited by M. Ye.
- ~ Rakovskiy, Izdatel'stvo "Sratistika", 16,000 copies, 168 pages]
[Text] The experience gained ~aha_le successfully developing the first phase of the
sy:tem of small computers (SM EVM) and the effective use of these computers in
various sectors of the national economy have determined the need for developing
high-throughput small computers suitable for systems of hierarchic control and auto-
, mation. Developing high-throughput small computers is a major task of the program
for the small computer system.
Modern electronic elements, new technology, more efficient software and the experi-
ence of international cooperation on the YeS [unified systemJ and sm~~ll system of
computers have made it possible to begin developing the SM-52/10 model at the
VIDEOTON plant (V:1R [Hiingarian People's Republic]).
The SM-52/10 has a flexible architecture which makes it possible to easily change
the configuration of a system to match the problem to be solved. This computer can
use the applications programs developed earlier for the small computer system, and
at the same time, for more complicated applications, it has the capabilities
offered by flexible architecture and programming.
In designing this model, the "3M principle" was realized: modularity (of hardware
and software), microprogramming and a monobus system.
The main principles realized in developing the architecture of this model are:
optimal distribution of tasks between hardware and software;
support cF a multifunctional mode by hardware and microprograms;
mutual protection of applications and systems programs while maintaining good
communication between them;
_ capability of using software developed earlier; and
realization of advanced "self-diagnostics."
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~ Realization of the design principles makes it possible to simultaneously solve
~ different types of problems on one and the same (logical) computer while providing
~ practically absalute protection of them from each other.* Division of the functions
; of the central processor is afforded by the technology of ESL- [emitter-coupled
~ logic = ECL] (which up to now has practically not been used in small computers),
~ TTL [transistor-transistor logic = TTLJ and MOP-BIS [metal-oxide-sem.iconductor = MOS
large-scale integrated = LSI circuits]. Floating-point or decimal operations are
performed in supplementary units, and, for example, separate funct~.ons of file pro-
cessing are supported by a microprogram memory realized in interface units (in some
_ cases with a capacity up to 10 K'bytes).
The models nave no traditional complicated control console; the method of remote
loading of programs and the method of remote diagnostics have been developed and
_ realized. The latter method affects the qualitative variation in hardware mainte-
nance. To satisfy requirements primarily for management of small data bases, the
model SM-52/10 has a main memory with a caQacity up to 1M byte and auxiliary stor-
age on disks with a capacity up to 200 Mbytes. The speed of the processor is main-
tained by buffer cache*~emory by matching the transmission rate between the memory
and other system elements. Terminal control and connection to networks i,s effected
through synchronous and asynchronous lines.
The model SM-52/10 has a multilevel (64) system of interrupts. Instructions have
the format of a word (16 bits) and data may have the format of a halfword (byte),
a word (16 bits) or a double-word (32 bits) with floating decimal. The micropro-
gram memory is made in the form of RAM [random-access memory] on-line memory.
Part of the memory is reserved for user needs, for example for expanding the system
of instructions. An integral part of the central processor is the microdiagnostics
which test the processor and cache memory and operate with each switch-on, but may
also operate upon command from the operator's console.
The central processor consists of the following standard modules: interface, cache
memory, arithmetic-logic unit and clock.
Besides the bus for memory and peripherals, the processor has a synchronous bus for
_ rapid internal communication between processor modules and beeween the processor
and special operating units.
The cache memory, in essence, is a"rate interface" between the relatively sla~7
main memory and the fast arithmetic-logic unit built with ECL processor sets. The
capacity of the cache memory is 8K words and each element in it is organized in the
form of a pair of words: a word with an even address and a word with an odd address.
Access to it during any ref.erence to memory is effected by the low order bits of the
even address. If the word sought is in the cache memory, then communication with
the main memory is not required, as a result of which execution of operations with
reference to memory is accelerated considerably (approximately 90 to 95 percent of
- the operations using memory are executed with the cycle time of the cache memory,
i.e., about 250 ns).
*
Up to now, ~his property had been the exc].usive privilege of only large computers.
A cache is a fast semicondUCtor memory.--Editor's note.
11
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i~OR s?1~1~1('IA1. litil~: UNI.Y
The arithmetic-logic unit is made with high-speed microprocessor sets of the bit
slice type; it contains the arithmetic module and the control fields for the micro-
- program memory. Addressing of microinstructions, decoding of the instructions and
checking memory segmentation is performed by the control module. The microprogram
memory may be loaded, and the microprocessor updates it. The control microproces-
sor reads the main microFrograms from the read-only memory [ROM] to establish the
initial states, and other microprograms are read from main memory.
. The operational units are used to raise the efficiency of the operations of FORTRAN
(with floating point) and COBOL (decimal); the units provide for hardware execution
_ of instructions oriented to high-level languages. The efficiency of various trans-
lating programs may be significantly enhanced by incorporating such special units.
The second processor, created from basic modules with microprogram memory, is used
for emulation. It is possible to use a large number of such processors to realize
other systems of instructions. Thanks to the high level of technology, the ti.me
ior execution of instructions typical for emulated architectures is no worse
than with the source modules.
Ti~e microprocessor interface units used for very high throughput peripherals
unload the processor to a considerable extent. In essence, they are a processor,
transformed into a Functional exchange control unit and a unit for d:irect access to
memory. These processors perform organization of data flow and control typical for
- a peripheral in an autonomous mode. In accordance with the modular principle, ex-
change processors differ from each other usually only in content of microprogram
memory. More "intelligent" interface units provide for execution of many new func-
tions for control of data transmission using interfaces created for various data
transmission networks (for example, synchronous and asynchronous interface,
X-interface according to ISO [International Organization for Standardization]
standards and others).
The model contains integrated and high-throughput units for control of peripherals; .
in addition, there is the capability of connecting peripherals to a simple standard
bus system. Used as peripherals (with regard to standardization) are the periphe-
rals for the YeS and SM computers in accordance with require~ents of throughput and
economy. T'or man-machine communication, the most efficient and convenient ATsPU
[alphanumeric printers] and displays with microprocessor control are used. Con-
trols and indicators on this equipment have been designed with maximal regard for
human engineering requirements.
The decentralized funcCions embedded in the hardware promote optimal selection of
software and ensure balance within the bounds of "cost versus productivity" and
"o~itlays For production versus cost of utilization."
The conc~~t of the Sr1-52/10 computer and the schedule for implementation allow con-
sidering it as one of the first models of the second-phase system of small computers.
It may be used extensively to solve the more complicated class of problems that
impose special requirements on a computing system.
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I~()R ()1~1~1('IA1. II~H: ()NI,Y
The author considers extremely important giving prompt assistance to users to
train them to operate this high-throughput computer, since experience shows that
use of the capabilities embedded in individual models depends on the degree of user
training. The design of this model will make it possible to relieve the user of
a number of routine maintenance tasks.
These efforts are being made in close international cooperation with users and
scientific institutions with respect to critical evaluation of the operating
experience of previous models.
COPYRIGHT: Izdatel'stvo "Statistika", 1980
8545
CSO: 1863/157
13
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FOR ON'FI('IAL [1SE ONLY
MODULAR CONCEPT IN DEVELOPMENTS OF GDR DATA PREPARATION UNITS AND TERMINALS
FOR YES E1ND SM COMPUTERS
Moscow VYCHISLITEL'NAYA TEKHNIKA SOTSIALISTICHESKIKH ~TRAN in Russian No 8, 1980
_ (signed to press 17 Nov 80) pp 13-19
[Article by C. Merkel, engineer, GllR, and H. G. Jungnickel, engineer, GDR, from
book "Computer Technology of the Socialist Countries", a collection of articles,
edit~d by M. Ye. Rakovskiy, Izdatel'stvo "Statistika", 16,000 copies, 168 pages]
(Text] The decade of cooperation between the socialist countries in computer tech-
nology is part of the socialist economic integra~ion. The Robotron Combine's con-
tribution to this integration has been the YeS-1040 and Ye5-1055 computers which
are operating successfully in various countries, and the 10 devices in the system
of small computers (among which are two second-phase microcomputers) developed and
put into production (before 1979).
Robotron produces not only central processors for the Ye.S computers; it is a major
producer of serial printers and peripherals, particularly data preparation units,
data teleprocess~.na~ devices and various special-purpose terminals, displays, mag-
netic tape cassette storage units and optical readers. Mass production os such
small computers as the Cellatron 8205 and the Robotron 4000/4201 have made it
possible to acquire experience for participation in developing the SM computers.
In accordance with the specialization in YeS and SM computers, the tasks of the
collective are:
to expand production of the YeS-1055 computers. The modernized version of this
model will be equipped with a matrix module that will make it possible to solve
the expression a+ bc with a high speed and thereby increase 10 to 50-fold the
speed of execution of this class of problems. The matrix module, made as an indi-
vidual special processor supplementing the standard processing unit, will allow di-
rect transmission between the matrix module and storage. Efforts continue to fur-
ther modernize the YeS-1055 computer. For example, it is planned to increase the
capacity of the main memory to 8 Mbytes, using semiconductor highly integrated
memory circuits;
to participate in developing operating systems and application program packages for
_ thz second series of YeS computers. The program package developed in the GDR pro-
vides the capability of using Unified System Computers on the virtual machine prin-
ciple, which will allow achieving high efficiency in developing user programs.
The shift to using new efficient operating systems is being facilitated;
1L~
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_ to make full use of the expertise and technical and economic potential in develop-
- ing small computers, peripherals and storage units for the YeS and SM computers
and data preparation devices. In the process, it should be oriented to the areas
in which the equipment developed by the combine has been used with success for
many years now. These are banks, financial agencies, trade organizations, agri-
cultural enterprises, statistical adminsitrations, railroad administrations and the
entire area of economic calculations in industry, construction and other social
areas.
Basic Hardware Requirements. The hardware under development to meet user demands
is used more and more in various fields of science and technology. In connection
with this, new requirements for them are also emerging. Studies and analyses were
made of user requirements for hardware in which man is allocated the role of
operator-executor. Based on these trends in computer application, an analysis was
made of those fields of application in which
a clear shift has been noted from autonomous small-scale data processir,g to complex
data processing (among which are teleprocessing systems with central computers of
the YeS and (or) SM systems);
data preparation requires new engineering solutions, primarily in problem-oriented
intelligent terminals directly in the workplace; and
use of terminals with broad problem orientation in teleprocessing systems will
make it possible to substantially raise the efficiency of control processes (in the
field of mass�s-~rvicing and production, in financial institutions, etc.).
In these fields, the hardware is used under conditions differing from those, for
example, in automating an industrial process. To obtain a solution effective for
computer users, both general and specific requirements must be considered.
General Requirements Imposed by Users on Hardware.
1. Clarity, i.e, the operation of people with a system must look simple, despite
the complex processes occurring in the system.
2. Capability of system expansion. Usually f_or the user, the fundamental
requirements are:
capability of simple forms of expanding the configuration, for example by periphe-
rals and additional memory (as a rule, this requirement is being met);
capability of system expandions: expansion of the capacity for addressing, the
list of instructions, connection of compatible units of devices for proportional
increase in the overall throughput of the equipment (for example, connection of
large external storage devices without overloading the channels);
capability of using efficient compatible programs, programming languages, data
bases or files, and operating systems;
capability of simple adaptation of the system to new user requirements, i.e.
flexibility, for example, by replacing microprograms.
3. Unity of principles of solution. This requirement significantly raises system
operation efficiency:
common engineering solutions allow the user to reduce the quantity of spare parts
and time for training maintenance personnel, and to reduce downtime and repair time;
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common logical and functional principles make it possible to better track system
operation within a device and between different devices, make it easier for users
tc develop program packages for various fields of applications, reduce outlays
for operation with devices and simplify maintenance of the different system units.
4. Adaptation of hardware and software to human habits. The most abundant
requirements are dictated by human engineering: location and layout of the key-
~ board, loca.tion of the display and text on a screen, referencing various devices
and data media (for example, changing magnetic tape cassettes). Other human engi-
- neering criteria are adaptation of shape an~ color to the environment, and con-
sideration of human habits in organizing machine operation. For example, the cus-
tom of letting l-he operator see immediately the symbol input by him through a key-
board on a screen or printer. Waiting in the course of a second makes hi.m unsure
and lowers productivity. However, if the computer response appears immediat~ly on
, the screen during interactive mode operation while solving complex problems, an
operator tends to feel that he is being "urged on" and he tires quickly. A waiting
time of 1 to 2 sec. in solving such problems may be considered a fast response.
But if an operator has to wait more than S sec. in solving simple problems, his
work rhythm is disrupted. In this sense, adaptation calls for extensive system
analysis.
- 5. High system reliability. For example, terminal reliability must be more than
98 percent for the commercial user. However, high reliability must not be achieved
through high economic outlays.
6. Small outlays for teaching programming and maintenance of the various system
devices.
- These requirements are equally legitimate for YeS and SM computer users. Develop-
ment of standardization and modularity of this equipment has determined the task
of developing a common technology for analogous directions of application of YeS
and Sri computers with regard to reasonable compromises with respect to interfaces,
control procedures, etc.
Specific User Requirements. Specific requirements for hardware to be developed
are defined by the working process of users. These requirements include various
data media adequately equivalent for the ~sser, various logging equipment, use of
various programming languages, etc. For example, it is natural for a user used to
working with magnetic cards to want attachments for processing these cards on new
accounting and office machines, and for the user who has not worked with magnetic
cards to want floppy disks. Terminals used in banks and those used to make reser-
vations are almost the same in the interactive procedure. Both terminals are ele-
ments of a multiaccess system controlled by a computer and require response time
on the order of a second, etc. But there are specific differences: the technique
of printing tickets and reserved seat tickets differs completely from issuing bank
documents or making entries in savings-bank books.
These 'legitimate speci�ic requirements limit the selection oi ha~d~aare for main-
taining a dialogue and presenting the results (parameters, entries, data) to the
user.
These facts were used in developing the new concept: the modular concept for the
units was compiled in accordance with general system requirements. Specifications
of the YeS and SM computers were considered as general conditions.
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General system concept of autonomous devices, complexes and subsystems. The basis
of the sets of data preparation units, devices for communication with a computer,
and microcomputers developed at the Robotron Combine were the features of applica-
tion discussed, general specifications, and the general and system provisions of
the YeS and SM computer systems. Development proceeded according to the follawing
~ basic rules.
- 1. Problem-oriented complexes and individual devices, as items to be marketed, are
� developed on the basis of standard units and devices, unified operating systEms and
software components, as well as problem-oriented special units and problem-oriented
software components.
_ 2. The set of unified units and individual devices is restricted; they are deve-
loped as general-purpose as possible and are subject to strict standardization.
Used, for example, are:
the two main trends of unified units of microcomputers of the SM-5040-2 type as the
8-bit version and the SM-5050/5110 as the 16-b~t version, compatible with the archi-
tecture of the system of small computers;
two types of serial printers, compatible design and system engineering wise, ~rith a
rate of 30-400 characters per second;
three main types of video monitor units;
two basic types of k~ayboards; and
a unified series o~ power modules and d whole assortment of other peripherals in
accordance with the design specifications for the system of small computers, includ-
ing a considerable number of purchased units from the nomenclature of the YeS and
SM computer systems.
3. Items are developed within the bounds of a common basic design in various forms
of execution based on CEMA standard No 834-77. This common ~asic construction
allows common design realization of seats, console devices and table devices. Pro-
duction is carried out by common industrial methods. These design solutions real-
ize the basic provisions of the system of sma11 computers, are efficient for aa-
vanced devices of the unified system of computers and meet the requirements for
application of modern microelectronics.
4. The individual devices and complexes for application, used as a remote terminal
or subscriber's station within data teleprocessing systems, presuppose efficiei?t
adaptation to the various control procedures and transmission algorithms which have
already been adopted or must be adopted in the Xe5 and SM computer systems. In
addition, facilities are offered for efficient adaptation to specified operating
systems.
S. For rational development of problem-oriented programs outside the bounds of the
proposed extensive standard assor~ment, efficient technology exists, including
appropriate aids for. programming and complexes for developments, whic.h may be
~~fferred also to ~ajor users and thereby will make it possible to reduce the con-
tinuously in~~i-easing ou~lays for programming. '
6. The set of. unified assemblies and units, software components and special compo-
nents is an open system, i.e. it is continuously supplemented within the bounds of
the speci_fied principles.
= 17
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� A series of devices and pioblem-oriented complexes within the YeS and 3M computer
systems has been and is being developed on this basis. The first of th~se devices
and some basic modules were shown at Moscow at the Second Joint Exhibit of the
Computer Technology of the Socialist Countries (1979):
the Robotron MFG 20--a general-purpose programmable terminal made in the form of an
individual work station;

I the Robotron DEG 20--a programmable device for data preparation with properties of
a tenninal (desk-top device);
the Rubotron PRT 20--a programmable complex device for reservations, also with
properties of a terminal;
the Robotron MRES 20--a system for development of programs for all items ba~ed on
the 8-bit SM-5040-2;
the SM-5040-2 microcomputer;
the Robotron 1152 serial prin.ter; and
the Robotron K 5251--a device with cassette magnetic tape conforming to the ISO
standard TC 97/2-35.
System diversity of devices may be achieved based on the unified core of a control
computer and strict unification of other main components. This approach made it
possible to focus efforts in software development on the more 3mportant problems
. and to combine the principle of modularity with high throughput of operating systems.
_ The Robotron Scientific Production Combine is also working on 16-bit microcomputers
with varying capacity, and these are used as the basis for developing efficient
problem-oriented complexes and devices to control data teleprocessing. These
complexes and control devices are, for example:
complete minicomruters for scientific, technical and economic problems in all
spheres of the economy. GDR efforts in minicomputers enter fully into the program
for development of the system of small computers. These machines may be used both
autonomously and in direct communication with a computer as a terminal or subscri-
ber station for a YeS computer. Their configuration has a large set of peripherals
_ of the system of small computers, multiplexors and general-purpose terminals.
- Offered as operating systEms are primarily the SM computer operating systems for
computing centers oriented to disk storage, the SM computer operating system for
application in real time and software for the base computer, especially for a YeS
computer;
beneral-purpose systems f~r data preparation for autonomous preparation of mass
information at enterprises, combines, research institutes and other institutions or
for direct communication with computers. Here too the system control unit of the
SM computer serves as a central core, to which along with the most varied peripher-
als are a~so connected multiplexors and terminals (primarily problem-oriented). In
addition to general-purpose operating systems, special software components are
needed. Subscriber stations of. the Ye5-8505 or YeS-8506 type will be developed fur-
ther by connecting other special devices for preparation of production data and
production control;
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a series of multiplexors and conce:~trators. Modular structure wi11 allow
reaiization by common concept of several versions of data teleprocessing control
uniLS with regard to the latest requirements. These devices are intended for use
in YeS computer networks and may as a multiplexor have a YeS computer channel
- adapter or process YeS computer control procedures as a concentrator; they may also
be used for siinilar functions in the system of small computers. In addition to
_ data transmission control through various interfaces, these devices are used to
monitor control and teleprocessing of information, and to realize such problems of
data teleprocessing as code conversion, buffer storage of inessages, message proces-
sing, adaptation of procedures, addressing of channels, message distribution, etc.
COPYRIGHT: Izdatel`stvo "Statistika", 1980
8545
CSO: 1863/157
1~
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DEVELOPMENT OF SMALL COMPUTERS IN CUBA
Moscow VYCHISLITEL'NAYA TEK'rII~IIKA SOTSIALISTICHESKIKH STRAN in Russian No 8; 1980
(signed to press 17 Nov 80) pp 19-23
[Article by L. H. Karrasko, engineer, Republic of Cuba, from book "Computer Tech-
nology of the Socialist Countries", a collection of articles, edited by M. Ye.
Rakovskiy, Izdatel'stvo "Statistika", 16,000 copies, 168 pages]
[Text] The development of small computers, begun in the Republic of Cuba in 1969,
for automated systems for real-time control and monitoring of the sugar harvest is
- being contintiously improved. Subsequently, the program of research and concrete
developments received an additional orientation to new objects where these systems
could be applied with great effectiveness. In particular, th~ research program was
aimed primarily at implementing a system for planning and management of the national
economy, as well as technical, scientific, social activity and others. A major task
was developing hardware for export.
The small computer development program in the republic includes not only designs,
plans and specifications for the short term, but is also part of a long-term pro-
gram for computer hardware development in the Republic of Cuba to 1990. A major
characteristic of the effort on development of computer hardware (SVT) is that it is
determined by the problems, methods and forms of international cooperation that are
specifically expressed in the Agreement on Multilateral International Specialization
in Developing and Producing Computer Hardware, adopted by the MPK po VT [Intergov-
mental Commission on Cooperation between the Socialist Countries in Computers].
Specialization by the Republic of Cuba has special importance for successful deve-
lopment of computer technology in the country, since it will ~illow applying high
throughput machines and progressive technology, building enterprises with optimal
scales of production ensuring their high profitability, and conducting an effective
export policy. On this basis, cooperation between the Republic of Cuba and the
countries participating in the MPK po VT is being improved and expanded.
The par~~cipation of Cuban specialists in the work of the MPK po VT has made it
possible to exchange information on the sCatus and evolution of this complex tech-
nology, to cooperate in scientific research and design, to forecast and implement
scientific and technical analysis and exchange technical documentation. Cuba's
participation in the agreement on specialization and cooperation in computer produc-
tion guarantees the country high economic effectiveness in the production, export
and import of this equipment and at the same time allows achieving a high techni.cal
level and quality in production.
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' N'OR UFFI('IAI. I;~E O'~LY
~ The SID-201 Series of Small Computers. The first group of models of SID-201 small
computers were developed over the period from 1969 through 1977. It includes four
type models: the SID-201, SID-201A, SID-201B (basic) and the SID-201B (expanded).
These models were not compatible with the unified models developed in the other
~ socialist countries. The SID-201 series of small computers is not a family; it is
~ a development of a set in which the technical structure or architecture has one
~ common line (set of instructions, memory word size, system of addressing and others).
' The early models of this group were the components for the later ones.
i
~ The first system, designed and built in 1969-1970, was the model SID-201. It con-
; firmed the capability of producing it in Cuba, despite the great difficulties in
I providing for the technology of production. The system SID-201 was used in sugar
~ plant~, particularly for organization and monitoring of rail transportation for the
; sugar industry. It was noted that with generalization of some characteristics and
! connection of a minimal number of peripherals, this system could be used not only
in the sugar plants, but in any other sector of the national economy. To this end,
the system SID-201A with expanded software capabilities was developed.
The model SID-201A was the first computer put into series production in 1970-1972.
The series was comprised of 20 units; in the process, more modern techn~logy of pro-
c~uction was achieved, and system reliability and economy was raised. System
throughput is 25,000 to 50,000 operations per second; the main memory with a capa-
. city of 4K words with 12 bits each is organized into pages of 128 words each; there
are four forms of addressing memory. This system furnished classroom and on-the-
job training for specialists in this technology.
The model SID-201B (basic) was developed in 1972 and its production was begun in
1973. This model had greater capabilities than the SID-201A; the experience gained
in designing and producing the previous models was taken into consideration in the
development. The main memory was organized on a modular basis which made it pos-
sible to increase the capacity from 4 to 32K words. The instruction set was expan-
ded 1.5-fold, and a system of interrupts from peripherals was provided. Software
was improved and the number of programs increased. According to assessments by
Cuban specialists, there was about a 10-fold increase in power and operating capa-
bilities with the SID-201B (basic) system compared to the SID-201A.
This model underwent further development in an expanded configuration, where the
central processor in general features was the same as that in the SID-201B (ba;ic);
interface units and a direct-access channel were added, which significantly
increased the system's technical capabilities, having provided the capability of
connecting a large number of peripherals. Development began in 1975 in connection
with tt~e need of introducing a new system for managing and planning the economy in
the country. The system has Iundamentally new characteristics compared to previous
one: input of standard perforated cards at a rate of 320 cards per minute and an
interface of peripherals through slow and high-speed channels make it possible to
transmit data at a high rate without delay.
- The model SM-2302 smal]. computer (SID-300) is one of the first re:=ults of the
unified direction of developments and production of computer equipment by the
countries participating in the agreement adopted in 1975. Development of this com-
puter began in 1976. Three pilot models were developed which successfully passed
joint international tests in the USSR in 1978. This computer was included in the
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E~c~k oH�Nic�iAt. u~i~: c~y~.v
family of the system of small computers with the designation of SM-2303. The
SM-2303 is now being put into series production.
In its element base, architecture and software, the SM-2303 is among the advanced
models produced in the socialist countries. The element base (developments of the
socialist countries) has a medium and high degree of integration. Thanks to the
standard interface, a number of different peripherals may be connected to it, begin-
ning with electromechanical and ending with magnetic with large capacity. The in-
struction system is more powerful than in the small computers of previous models.
T~aelve forms of addressing allow increasing the efficient rate of computation and
facilitate using the computer. The system of interrupts has four levels of priority
which considerab~y increases the power of the machine and also facilitates
operating it.
The model SM-50/40-1 microcomputer (SID-400) was developed completely on the hasis
of large-scale integrated circuits (BIS) and microprocessor sets developed in the
socialist countries. This model has perforated tape input and output and additional
storage on floppy disks. The system is useful wherever automation of engineering
and adminsitrative activity is being delayed because of the high cost of small com-
puters, and also because of the requirements for their operating conditions; this is
primarily the small enterprise or specialized department of economic activity. Up
to now in Cuba, t~is problem had been solved partially through import of calculating
- machines, which besides their high cost had other shortcomings too, such as rela-
tively low productivity, limited application, much space occupied, etc. Development
of a family of SM-50/40-1 machines will make it possible to avoid these shortcomings.
The microcomputers will also be used as elements of the SM-2303 system of small com-
puters (modular construction) and in computer networks.
The SM-7203 Video Terminals (SID-702). Development of peripherals has been proceed-
ing along with development of the small computer system. The first result is the
Srt-7203 .(SID-7U2) alphanumeric video terminal. Three pilot models were developed
which successfully passed joint international tests in 1978.
The SM-7203 has a set of 64 different ASCII [American Standard Code for Information
Interchange] characters; 20 lines of 72 characters per line may be displayed on the
screen. There is also a standard alphanumeric keyboard. The terminal operates in
two modes: standalone and with a computer. Among the capabilities this unit offers
users are:
blinking or normal cursor indicating position of next character;
insertion or deletion of characters or line of text;
cursor movement in any direction, position by position or continuous;
adjustabi,: margins L-or text being transmitted; and
- scrolling.
The terminal has an audio signal to indicate line or screen margin.
22
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I~OIi Of~l~l('IA1, tl~w: ONI.Y
Future developments. Under development now is a mcre powerful computer (the
SID-300/20), compatible with the SM-2303 as well as with other models of the system
of small computers. This new model will have a higher degree of integration and
a Zarger main memory.
In the development of microcomputers, research and development is underway on new,
more powerful machines (the SID-400/20); and solutions are being sought to expand
their appli.cation in the national economy.
Deveiopment is also proceeding on several models of video terminals, based on compo-
nents of larger-scale integration, including a microprocessor.
Unity in the engineering policy for development ensures assimilation of new models
without special additional efforts (particularly in training specialists to operate
them), as well as the capability of development of application and the compatibility
of systems.
COPYRIGHT: Izdatel'stvo "Statistika", 1980
8545
CSO: 1863/157
23
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i~OR OI~I~I('IA1. Iltil~: ONI.Y
PRINCIPLES OF BUILDING MUI.~TILEVEL AUTOMATED CONTROL SYSTEMS
~ rioscow VYCHISLITEL'NAYA TEKHNIKA SOTSIALISTICHESKIKH STRAN in Russian No 8, 1980
(signed to press 17 Nov 80),pp 23-29
(Article by R. S. Sedegov, doctor of economic science (USSR), V. A. Bashko, candi-
date of economic science (USSR) and A. M. Shipulin, engineer (USSR), from book
"Computer 'L'echnology of the Socialist Countries", a collection of articles, edited
by M. Ye. Rakovskiy, Izdatel'stvo "Statistika", 16,000 copies, 168 pages]
[TextJ The shift to development of complex systems with automation of control at
all of its levels has become a real necessity and characterizes the new stage in
the development of ASU jautomated control systems = ACS)--multilevel automated con-
trol systems.
The lack of a unified concept for building systems to control production (associa-
tions, combines, enterprises) causes the emergence of various, often contradictory,
requirements for the organization and technology of developing and implementing the
systems, and makes it impossible to establish general norms, rules and standards,
and prescr~bed procedures for the development, implementation and funetioning of the
systems. Therefore, it is becoming especially urgent to develop a systems methodolo-
gy for building multilevel ASU's that ensure coordinated control of the various
production and industrial objects, integration of control procedures and methods,
and integration of the processes for design of the controlled objects and control
systems, as well as their assimilation and functioning.
A multilevel automated control system is a complex man-machine system based on a com-
puter and teleprocessing hardware, intended to obtain needed data and to control an
association and its structural units. It realizes control of an association, the
enterprises and industrial processes, coordinated in goals, criteria and procedures
for data processing. A multilevel ACS includes these levels: the upper level--an
ACS for a production association (ASUPO), the middle level--an ACS for an enterprise,
branch, shop or section (ASUP), and the bottom level--an ACS for industrial
process~^ (ASU TP).
A multilevel ACS must ensure output of a product with the least physical, manpower
and cost inputs. The use, parallel with traditional control methods, of uncoordi-
nated systems for control of individual industrial and organizational processes does
not, in the majc,~~ity of cases, yield the necessary efficiency of control. The deter-
mining role in the development of a multilevel ACS is played by the mutual coordina-
tion of the purposes of control at all levels and the well-grounded selection of
L L~
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APPROVED FOR RELEASE: 2007/02/49: CIA-RDP82-00850R440400030007-7
I~()R (ll~l~l('IAI. Iltil~: ()N1,1'
_ the criteria of efficiency in strict accordance with the established purposes of
control, participation of administrative personnel in development of the systems,
and organizational, hardware, software and data compatibility. In a multilevel
structure of an integrated system for control of an association and an enterprise,
each control unit must perform the tasks of the senior unit and in turn establish
the target tasks, limitations and criteria for the control units subordinate to it.
A multi_~vel ACS is a complex control system with a trilevel structure that realizes
the following directions of integration:
functional-purposeful (unity of purpose and a system of coordinated criteria);
organizational (rational combination of administrative activity of personnel and the
ACS);
_ software (combined and interrelated complex of models, algorithms and programs);
i.nfc~rmatianal (unity of sources and files of data); and
hardware (unification of the hardware complex to raise the throughput and reliability
of the computer data network).
A multilevel ACS must perform the selected functions of control of specified objects
on the basis of
_ coordination ~f goals and the problems that are to handled by the system and its
individual subsystems (components);
formulation of a rational structure of the control system;
interlevel exchange of informarion;
- coordinated solution of control problems of the different levels; and
organization of interrelation between automated systems for planning, accounting and
monitoring and systems of industrial automation.
~ Development of a multilevel ACS is a complex problem, for the realization of which
the countries of the socialist community have been enlisted within the framework of
the Council on Application of Computer Technology. In developing a multilevel ACS,
the following principles must be realized:
systems approach under the conditions of limitations on resources;
compatibility of all types of support (organizational, informational, hardware .!nd
software);
rational combination of centralized and peripheral hardware for data processing;
integration of levels by purposes, criteria and procedures of data processing;
maximal utilization of NIR [research] conducted by the socialist countries in accor-
dance with the plans of the Intergovernmental Commission on Computer Technology; and
the capability of ACS functional evol.ution as experience is gained and new structures
and industrial objects are connected.
The hardware complex (KTS) of a multilevel integrated ACS (IASU) is a complex system,
consisting of interacting hardware complExes of the ACS's of all three levels, in-
_ cluding facilities for acquisition, storage, processing, presentation and transmis-
- sion of inEormation, as well as the hardware to interface them, which result in
solving the complex of problems of all classes of the multilevel ACS.
2~
I~nR nFFI('IA1. USI? ONI.Y
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The intricate system of the hardware complex stems from the need of using various
structures of hardware and methods of realizing the goals set (the problems). The
- hardware complex of multilevel ACS's must meet the following requirements:
capability of building hierarchic and multiprocessor ~omputer complexes;
use of data transmission networks and teleprocessing facilities;
use of small computers for preparation and decentralized processing of data, and
for control of industrial processes and equipment;
capability of acquiring valid data under the condit~ons of production interferences
and personnel errors;
reliable operation of individual hardware complexes in an aggressive environment;
hardware, data and software compatibility;
validity of problem solving;
minimal outlays for hardware maintenance; and
short payoff period and high economic effect from introduction of the multilevel
ACS.
As base equipment for the system's top level, third-generation medium and large
computers--YeS and SM EVM [unified system and system of small computers)--must be
used. The Sri-1, SM-2 and SM-3 series of small computers must be used extensively
at the bottom level of a multilevel ACS as machine-dispatchers, for preliminary
data processing and for controlling industrial processes.
As network terminal equipment at the bottom level of an integrated ACS, subscriber
stations and terminals that support data input and storage and output of results
must be used. Two types of terminals are used: simple with hardware control and
input-output equipment, and terminals with input-output equipment and a small com-
pster for pro~;r.vn control and preliminary data processing. Terminals operating in
real time may obtain data from sensors, metering instruments, etc. The terminals
developed may accept and put data into a computer and edit data. The most widely
used terminals for a data teleprocessing system within the unified system are the
subscriber stations. A subscriber station is one or several unified system
peripherals with a special control device performing various functions.
A subscriber station collects, prepares and accumula~es data for transmission to a
computer, and inputs-outputs and displays data.
Software (PO) for. a multilevel ACS must meet the following requirements:
~~se of a multiprogram real-time operating system for organization of data acquisi-
tion and processing;
n avail~bili,:y of data bases for use on-line;
reliaUi.lity of functioning;
restoration o� status of data at a specific moment of time; and
maintenance of communications with the software at the different levels, both
functional and informational.
26
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FOR OFFI('IA1. U.'',E ON1.1'
- These requirements, as well as a large number of problems in the multilevel ACS's,
and the increase in communication and dependence between software components shape
the development of the software in two directions: general systems and probl~m.
In addition to type procedures (input, sorting, etc.), the functions of general sys-
tems software include:
organization of system operation in the specified modes;
distribution of computing operations in accordance with their dynamic priorities;
monitoring the executi.on of computing operations;
timely preparation and input of data bases needed;
differentiated access to information in a data base;
monitoring the operation of terminals and small computers;
- initiation of operation and control of a teleprocessing system; and
communication with the system operator and terminal operators.
Problem software functions are:
loading and management of the information base of normative-reference information;
loading and management of real-time informational bases for all levels of the ACS;
solving the problems of control automation; and
capability of restoring the status of the data.
These software requirements and functians determine the selection of the main com-
ponents of the general systems software, namely: the operating system, the data
base management system (SUBD) and the teleprocessing system.
In selecting an operating system, it is very important to take into consideration
the capability of using application program packages developed earlier. Simul-
taneous operation of different operating systems in an integrated ACS is not ruled
out~ In selecting a teleprocessing system, the tasks of the multilevel ACS, the
requirements for data processin~ from the user aspect and hardware capabilities
must be considered. The determining factors in selecting a teleprocessing systen
are the type of base operating system selected and the data base management syGtem.
The information base of multilevel ACS's is the aggregate of the unified system of
classification and coding of technical and economic information and the unified
systems of documentation and files of information used in all levels of the hier-
archy. The components of the information base for multilevel ACS's are the data
bases for the automated production association control system, the automated enter-
prise control system, the automated system for control of industrial processes and
the data base management system.
Information compatibility of the functional systems means developing coordinated
sets of classifiers and codifiers that ensure smooth exchange of information in the
links of man-machine and machine-machine at all three levels (production associa-
tion, enterprise, work place ~r industrial process).
27
F'OR OFFICIAI. USE ONI.Y
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APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400030007-7
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APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400030007-7

APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400034007-7
FOi~ OFFICIAL USF. ONLY
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60
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APPR~VED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400030007-7
1~()I2 ()I~N'I('I.A1. ll~l~: ()NI.Y
Following designations are used in table 1:
IRPR interface for radial connection of devices with parallel exchange of data
(MM SM 004-76);
IRPS interface for radial connection of devices with serial exchange of data
(NM MPK po VT 010-78);
INML interface for small magnetic tape storage units (NM MPK po VT 019-78);
IKA'ID interface for magnetic disk cartridge storage units (MM SM EVM 007-76);
SIF 1000 interface for radial connection of devices with parallel exchange of
data (ASKI);
ISO interface for linear connection of USO [process communication unit] with
serial data exchange;
GNI instrument interface for floppy disks;
ASP controller for IRPR interface;
ASI controller for SIF 1000 interface;
ASD controller for IRPS interface;
ATP controller for ISO interface;
AMB controller for INML interface;
AKB controller for IKMD interface;
AFS controller for GNI interface;
AFK controller for fixed magnetic disk storage unit.
status of the controller and peripheral. For peripherals 16-22, peripherals access
memory in the direct access mode (DMA). Except for the SVE 30 memory control unit,
the DMA mode is possible only through the SM-50/50-2 system bus or the SM EVM
common bus.
The SM-50/50-2 microcomputer system is built on the modular principle and may be
optimally matched in throughput and configuration to the application conditions.
The following microcomputer configurations are possible using the system modules:
the K-1620 microcomputer in the form of a built-in computer with medium throughput;
the K-1620 microcomputer in the form of a computer complex with medium throughput
(autonomous); and
the K-1630 microcomputer in the form of a computer complex with high throughput.
The computer throughput parameters are shown in table 2. Thanks to the prograr.. and
interface compatibility with the SM E~1M, it is possible to make use of the wide
range of SM EVM software and peripherals. The system concept provides for future
eKpansion of the spectrum of modules.
The K-1620 microcomputer is a medium throughput model. A built-in K-1620 computer
is intended to operate as a problem-oriented computer included in a hardware compo-
sition. An autonomous K-1620 computer is intended as a stand-alone computer for
solving general-purpose problems of control and data processing; it is built on the
modular principle and may be optimally matched to the conditions of application by
selection of the modules needed.
The 25 processor (ZVE 25) is the nucleus of the K-1620 microcomputer. It is built
on a base of the U 830 LSI processing circuit and contains a control unit based on
TTL [transistor-transistor logic]. The system architecture of the K-1620
61
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microcomputer provides for connection of all system components through a common
- trunk--the SrI-50/50-2 system bus.
The SM-50/50-2 processor-controlled system bus is a bidirectional interface through
which addresses and data are transmitted multiplexed in time and in parallel. Data
is exchanged synchronously for addresses, but asynchronously for data. The 25 pro-
cessor realizes the basic SM EVM instruction set and is compatible through interface
with the SM ~VM through the BUNI [interface converter for ruses] and the SM-50/50-2
system bus.
T}le processor operates with microprogram control on the asynchronous principle of
control. The K-1620 microcomputer is serviced by using a communications device
connected to the Shi-SO/SO-2 system bus through a serial interface (IRPS) anc' con-
troller. T1,ere are also minor capabilities for service and display by using the
_ front panel of the processor. In addition, the front panel has a display for fan
malEunctions and the Lill level of the support accumul.ators for holding data.
The h-1630 microcomputer has the highest throughput in the SM-50/50-2 system. It is
in~ended for more comprehensive systems of small computers with higher throughput;
it may be used for computations in real-time and multiprogramming systems and in
multisubscriber systems. The K-1630 computer is built on the modular principle and
may be optimally ni~tched to application conditions thanks to available system com-
ponents. The nucleus of the computer is the high-througt?put 30 processor (ZVE 30),
~Tiilt on a base of LSI elements. The memory control unit (SVE 30) allows expansion
of the range of addressing for the processor to 256K bytes and also realizes memory
protectian. The model K-1630 may also be equipped witli an arithmetic processor
(ARP 30) that allows fast processing of 32-64-bit numbers with floating point and
16-~~-bit numbers with tixed point. The K-1630 microcomputer system architecture
provides for connecting al1 system components through the SM-50/50-2 system bus and
the ZV~ 30 processor realizes the SM EVM instruction set.
The K-1630 microcomputer is designed as a slide-in unit in which the processor,
memory and controllers are placed. Depending on the type, the peripherals are
built-in, attached or desk units. Servicin~ of the K-1630 microcomputer is
similar to that for the K-1620.
The ARP 30 arittunetic pr.ocessor supplements the K-1630 microcomputer and cannot
operate without the ZVE 30 processor. It is built on the base of the U 832 LSI
arithmetic expander and also contains a number of registers and a control unit
l,~s~d on T'fL. It operates with microprogram control. Aside from the basic arith-
metic operarions (addition, subtraction, multiplication, division and conversion
operations), the ARP 30 executes a number of additional instructions in the format
of iwmhers ~ai.th i:loatin~; and fixed point. The ARI' 30 is linked to the ZVE 30 pro-
cessor throu~;h the SM-50/50-2 system bus and direct links. The processor perEorms
all. adcir~~s computations for the ARP 30, assigns data for operations and receives
results after execution of operations. Data is exchanged asynchronousl3~ between
the ARP 30 and the ZVr 30 and within the ARP 30.
System-deLining integrated circuits. LSI circuits that have no prototype are used
in the Sri-SO/50-2 computer. MOS technology was used to design these LSI circuits.
They were developed especial.J.y for the SM-50/50-2, but are also so versatile that
they may Ue used in other computers and electronic devices too. The following
62
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Table 2. Computer Throughput Parameters
Parameter K-1620 K-1630 ARP-30
Word length 16 bits. Parallel processing of similar to with fixed point:
words and bytes K-1620 16 and 32 bits;
with floating
point: 32 and 64
bits
Number with fixed point, radix same
representation complement
Number of about 400 (including same 30 basic
instructions modification instructions
Instruction SM EVM instruction set same
- system
Control asynchronous microprogram same similar to K-1630
principle control, horizontal microprogramming
Number of types 12 12 8
of addressing
Number of general- 8 8+ 8 9, of which 4 are
purpose registers accessible to the
programmer
Range of 32K words (memory 28K words, 128K words
addressing IO registers 4K words or (of which 4K
64K bytes) words are IO
registers) or
256K bytes
Interrupt vector organization of similar to K-1620
system interrupt processing, 5 levels
of interrupt, of them 1 level
for DMA
Levels of TTL TTL
signals
Preservation available available
of data when
power f ails
Automatic available available
RESTART
Rcal-time clock cycle is 20 ms; similar to K-1620
clock serviced by software
IO organiza- software and direct access similar to K-1620
tion
Organization available available
of interrupt
queue (stack)
~3
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Continuation of table 2.
Parameter K-1620 � K-1630 ARP-30
Operator through remote console and
communication front panel
- E~ecution of microprogram microprogram with with
- instructions: floating fixed
.ADD/SUB point of point of
32 bits, 16 bits,
5-12 ps 1-5 Ns
.MUL by program by program 7-15 �s 2.5-10 �s
.DIV by prograr~ by program 15-30 ps 7.5-30 }~s
~ypes of LSI circuits have been developed: U 830 LSI processing circuit,
t? 831 LSI control circuit, U 832 LSI arithmetic expansion circuit and
U R34 LSI trunk adapter circuit.
All the LSI circuits have the dual in-line package (DIP) with 48 leads.
Ttie U 830 LSI circuit is a cascade-connected , processing circuit with eight bits
for creating the computing circuits with mieroprogram control. Joining two or four
of these LSI circuits increases the processing word length to 16 and 32 binary bits,
respectively. Processing of one microinstruction takes about 1 microsecond.
Thz U 831 LSI circuit is a microinstruction memory circuit with asynchronous genera-
tion of signals. It requires no external clock. The microinstruction memory cir-
cuit is built in the form of a programmable logic ma.trix (PLM) with 140 terms (num-
ber of DNF). The PLi~ is programmed by masking. Information input to the PLM has
20 bits of input data and 8 bits of internal address for tracing. Thus, each input
information may cause 28=256 read cycles, i.e. the maximum length of a microprogram
is 256 microinstructions. Branching (up to 16 directions) is possible at any point
_ in the microprogram. This LSI circuit is used either separately, or jointly with
the U 831 LSI circuit in computer control devices, for control in controllers and
peripherals or control devices without a computer. The content of the PLM may be
optimized using the optimization program that operates with the YeS EVM [unified
system of computers). The U 831 LSI circuit in the SM-50/50-2 is used to control
peripherals.
'Ttie U 832 LSI circuit is a cascade-connected circuit for building fast microprogram
contr~~l.led arithmetic processors with a high number of bits. In addition to simple
uperations, multiplication and division of numbers with a fixed and floating point,
zs well ntal C~nunission on Social,ist Countries' Cooperation in Computer Technol~gy].
The mai~. technical data for the unit are:
Number of accessible disks 2
Capacity of useful data, Mbits 4.1
~verage data access time, ms 205
Mean time to failure, hours 1000
Validity, bits +10% 109
Power 220V _15~, 50 +l Hz, 500-A
Power for interface adapter board -5V, 2A
6B
APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400030007-7

APPR~VED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400030007-7
I~OR OFI~I('IA1. lltil? ONt.l'
The structure and principle of operation of the controller can be traced by analyz-
ing the flowchart of the formatter and selector. The formatter, assembled on three
_ boards, realizes the dialog with the microprocessor, selection of the disk, side,
track and sector, preparation of the data for recording on the disk, read-out of
data and setting of the head on the threshold track.
These actions are determined by the microinstructions contained in the read-only
memory (ROM). The microinstructions are grouped into microprograms that realize
specific operations. A microinstruction determines the type of operation and the
address of the arguments. ROM addressing is determined by the status of the con-
trol logic. This address may be the status of the address count~r; a microinstruc-
tion, content of the main register or address in event of interrupts. Interrupt
signals start subroutines to process them while the main program is delayed.
The wait register allows synchronizing the program run with an external asynchro-
- nous signal. The arithmetic-logic unit processes information in accordance with
the instruction in the input registers or in the buffer main memory of the RAM
[random-access memory] type.
The device performs the operation of data processl.ng by using the main register.
_ The result of ~he operation is placed in either the output registers of the buffer
memory or in the main register. Buffer memory is used to increase the data trans-
, mission rate in a small computer. Data from the small computer is accumulated in
buffer memory, then output to disk. Data read from a disk is put into buffer memo-
ry at the rate of 250 kbits/sec, but output to a small computer at the rate of
500 kbytes/sec. The data exchange between the small computer and the buffer memory
is monitored by the arithmetic-logic unit.
Data to be written on a floppy magnetic disk passes through a cyclic monitoring
circuit. A check character, determined by thi_s circuit, is written to the data.
When the data is read, the check character allows the monitor circuit to find
errors made in writing or reading the data from the disk.
The selector, realized on one board, performs two basic functions: it classifies
the data sent from the formatter, directing it to the corresponding disk as a func-
tion of the specified address, and generates si~nals to control the operation of
the SM-5602 storage unit.
~ The PSPD 90 device for data preparation and processing substantially extends the
capabilities of usin~ a computer. It allows accumulation and systematization of
data on flopPies. Unit maintenance is simple. The operator guides the operation
by calling a series of inst.ructions from the keyboard. The instructions include:
basic oper.ations (input, confirmation and ver.ification of data);
auxiliary operations (ret.rieve, read and replace file names, retrieve data in a
file, cancel. recordings, service programs);
test operations (check the main units in the device and indicati.on of malfunctions);
operations of automatic processing of data that contains possible calculations
(add-ition, subtraction, multiplication and division) on fragments of data, and
operations on files tha~ allow creating new multidisk files and updating old ones,
.is we].l as printing back-up documents on a matrix printer; and
6~
F'OR OPFIC'IA1, (I~F; OM.Y
APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400030007-7

APPROVED FOR RELEASE: 2007/02/49: CIA-RDP82-00850R440400030007-7
HOR OHFI('IAL I1SN: ONLY
operations that realize telecommunications with a large computer, direct communica-
tions with a small computer, as well as recording of data on magnetic tape.
Durf.ng execution of all these operations, the device outputs graphic indications
and test comments on the monitor screen (video terminal) and light signals on the
keyboard.
Mu,rponpu- llocmoaHNOe ~ ~ Onepa~uBHOe' Budeomep�' ~
- ueccoa 1 3y 3y nuNan
(1) (2) ~3~ , , ~4 ~ .
QAHHb/E - AQPECA - Yl1PABAEHNE ' �
i .
~
~ . ~
KoNmpon,~a; IlozuKa BBv3-~Bo~dod HNm~PO~eac
HAKJ~74meaa ~ npepciBanuu VP4~. '
~6) (7), 8
. ,
~ yf7p0a11Q0 2 ~
CP1-5607 CM-5602 . KnaBuaryp newamu .
DIM 1B0
J 1 2 3 .
_ Fig. 3. Block diagram of the PSPD 90 unit for data preparation and processing
Key:
1. microprocessor 7. interrupt logic
2. ROM 8. input-output
3. main storage 9. V24 interface
- 4. video terminal 10. SM-5602
5. data - addresses - control 11. keyboard
6. storage unit controller 12. DZM 180 printer
The block diagram for the data preparation and processing unit is sho~n in fig. 3.
This is a typical block diagram of a microcomputer with these peripherals: two
SM-5602 floppy magnetic disk storage units, keyboard, screen monitor and DZM 180
matrix printer. The low cost of this arrangement is achieved primarily through
the simple design of the screen monitor. The monitor receives from the "Video"
board a complex signal containing the image and synchronizing pulses. Screen
capacity is 512 cliaracters (16 lines of 32 characters each). Any character may
l~ave a direct or reverse image allowing especially important information to stand
out. The alphabet can be changed by changing the character generator realized
with PROM circuits.
The keyboard is serviced completely by software and the key codes are a function
of the table in the microcomputer memory.
70
APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R000400030007-7

APPROVED FOR RELEASE: 2007/02/09: CIA-RDP82-00850R044400030007-7
ruK c~i~t~ic~ini. ~,~i~: oni.v
Having provided a brief description of the three peripherals introduced into the
system of small computers that use floppy msgnetic disks as a data medium, the
authors are prepared to send more details to those interested. Send your request
to: MERI~-KFAP, ul.. G. Zapol'skoy, 38, 30-126 Krakow, Poland.
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